1. Field of the Invention
This invention relates to a method of fabricating matched polycrystalline silicon (polysilicon) resistors as well as a method of fabricating resistors which more closely provide a predetermined resistance value.
2. Brief Description of the Prior Art
Standard polysilicon processing techniques include the step of either doping the polysilicon during the step of polysilicon deposition or doping the already laid down polysilicon by a blanket dopant implant after the polysilicon deposition has taken place. In order to define the resistors to be fabricated in the polysilicon material of the above described type, a pattern for such resistors is laid down over the doped polysilicon in standard manner and the pattern is etched in standard manner, the resistance value of the fabricated resistor being determined by the dimensions of the etched doped polysilicon as well as by the doping level of the polysilicon. A technique of this type is described in "The Design of Thin-Film Polysilicon Resistors for Analog IC Applications", by William A. Lane and Gerald T. Wrixon, IEEE Transactions on Electron Devices, Vol. 36, No. 4, April 1989, pp. 738-744.
The above described procedure subjects the resistors being fabricated to dimensional errors caused by both the masking and the etching procedures and the variations therein due to undercutting and for other possible reasons since the etchant cannot be controlled to the degree desired. Such errors result in an inability to match resistors as closely as may be desired as well as the inability to fabricate a single polysilicon resistor which displays a resistance value as close as may be desired to a predetermined resistance value. It is therefore apparent that a procedure which will improve the above noted problems is desirable in the art. It should be noted that, while there may be other resistance value error-causing factors present in the polysilicon fabrication procedures, these other error-causing factors are not being addressed herein.